Introductory Vhdl: From Simulation to Synthesis

Rating:
Summary: Overall, good book for begineers.
Review: had to buy this book for subject at uni. The arena of VHDL, digital logic, synthesis and simulation is a broad subject and it can be hard to know where to start and where to find the right information. Overall I found the book to be a good introductory text and reference but with a few small annoying features.

This book is definitely at the begineer level. The really good feature of this book is the focus on synthesis of VHDL code. If you are learning VHDL from what vendors publish and what is on the internet you may not find what you need. Chapter 7 especially will fill in the missing pieces and give you a good idea of what is going on with things such as synthesis compiliers. Haven't seen any other texts that explain that kind of thing.

The items that let the book down is that the book seemed to be riddled with textual errors. Numerous times there seemed to be words missing from sentences and it really interrupts the flow of learning. The other part that was frustrating was that the tone the author took seemed to be like an adult talking to a baby.

However, he proves his point and I can understand the motivation for doing so, because VHDL is not a normal programming language.

Something that I believe would have been helpful to others would be having the simulation software on the CD with an appendix overview of what is going on with those tools.

If you are an undergraduate, new to VHDL and are new to using EDA software like Xilinx and don't quite follow everything, then this book will get you going quickstart. It will help to minimise the distance between the two topics of FPGA's and VHDL, which can save you an enormous amount of wasted time.